Kepler

FPGA Digital Design Engineer (6+ month Contract)

Canada full-time Senior Salary not listed
full-time Senior level Technology & IT Curated
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About the role

At Kepler Communications, we're not just imagining the future of on-demand space connectivity - we're leading it!
Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities.
Industry-leading technology is only part of the story. What sets Kepler apart is our team: bold thinkers, skilled builders, and passionate problem-solvers who thrive on pushing the boundaries of what’s possible in space. We believe great ideas come from diverse perspectives, and we’re committed to creating an environment where you can grow, lead, and make a global impact.
If you’re ready to reach higher, move faster, and do work that shapes the future space economy - this is your launchpad. Come build the future with Kepler!

What We Offer:

* Competitive compensation with a robust equity plan to share in our success.

* Comprehensive coverage for health, dental, and vision insurance—including dependents.

* Unlimited vacation, supportive parental leave policy, and company-wide holiday shutdown.

* Semi-annual company-wide parties and frequent in-office team events.

* Relocation packages available for approved roles.

* $1,500 annual professional development fund to support your growth.

* Fully stocked Toronto office kitchen with snacks, drinks, games and top-notch kitchen appliances.

* Town Halls, Celebration Calls, and Company-wide events to stay connected and engaged.

* We’re a certified Great Place to Work®, seven years in a row!
We’re on the hunt for a top-tier FPGA Digital Design Engineer for a 6+ month contract to develop the next generation of our satellites.
At Kepler, you’ll have the opportunity to work with a dedicated team of engineers building the Kepler spacecraft. You will be responsible for the design and implementation of FPGA code either with a focus on DSP algorithms to modulate and demodulate signals on board our software defined radio (SDR), or embedded systems interfacing with processors and peripherals. To be effective you will need to participate in all phases of FPGA design flow (Simulation, Synthesis, Place & Route, Timing Closure and Hardware Testing). A good understanding of the intricacies of FPGA development would make a candidate standout.
Key Responsibilities:

Develop custom IP for new features of the Kepler satellite digital payloads

Iterate on current DSP and interface designs to improve reliability

Work with IP core vendors to integrate new functionality into the Kepler designs

Work with lead engineers in developing the communications and network architecture of our future satellite constellation

Participate in conceptual design studies of new spacecraft

Required Skills & Qualifications:

Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent

5+ yr. working experience with FPGA/RTL design

Verilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilog

Xilinx FPGA(s). Specifically, Zynq and UltraScale

Solid understanding of timing principles, including clock domain crossing and timing closure

Strong scripting skills (e.g Python, Tcl, csh/bash, etc.)

Experience with FPGA tools (e.g Vivado, Quartus), HDL Simulation Tools (ModelSim)

Bonus Points:

Masters of Science in Computer/Electrical Engineering, or equivalent

Experience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAM

Experience with memory mapped interfaces such as AXI, Wishbone, Avalon

Experience with high-speed transceivers for protocols such as JESD204B, PCIe, SATA

Experience with Linting tools, Questa Sim or Riviera-Pro

Experience with Xilinx Versal and RFSoC

Experience designing printed circuit boards

Knowledge of radio-frequency electronics design

Employment Equity & Accommodation Statement

Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.
If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at , and we will work with you to meet your needs.
Originally posted on Himalayas

Interview prep

Walk in with sharper answers.

Use this as a quick practice sheet before you speak with the employer.

Senior
Technology & IT Human Resources Python Fpga Digital Design Senior level

Likely questions

  1. Tell us about work you have done that is close to the FPGA Digital Design Engineer (6+ month Contract) role.
  2. How would you approach your first 30 days at Kepler?
  3. Which of Human Resources, Python and Fpga have you used recently, and what did it help you achieve?
  4. How have you led people, improved a process, or made a hard decision in a previous role?
  5. How do you handle busy days, changing priorities, or pressure at work?

Prepare before the call

  • A recent example that proves your experience with Human Resources, Python and Fpga.
  • One short story with a problem, your action, and the result.
  • Two examples that show the strengths listed on your CV.
  • A clear reason why this role and company interest you.
  • Your availability, preferred work style, and salary expectations.

Ask them

  • What would success look like in the first 90 days?
  • What are the main problems this hire should help solve?
  • How does the team give feedback and measure good work?
  • What does a normal working week look like for this role?
Practice line

I am interested in the FPGA Digital Design Engineer (6+ month Contract) role because I can bring practical experience in Human Resources, Python and Fpga, learn the team quickly, and contribute to the outcomes Kepler needs from this hire.

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